1. Field of the Invention
The invention relates to an active matrix substrate partially constituting a liquid crystal display device, and a method of fabricating the same.
2. Description of the Related Art
FIG. 1 is a cross-sectional view of a conventional active matrix substrate 100 partially constituting a liquid crystal display device.
The active matrix substrate 100 is comprised of a glass substrate 101, a thin chromium (Cr) film 102 formed as a gate electrode partially on the glass substrate 101, a silicon nitride film 103 formed as an electrically insulating film, covering the thin chromium film 102 and the glass substrate 101 therewith, an active layer 104 formed on the silicon nitride film 103, n+ doped amorphous silicon film 105 formed partially on the active layer 104, a thin chromium (Cr) film 106 formed as a barrier film on the n+ doped amorphous silicon film 105, and an indium tin oxide (ITO) film 107 which will make a pixel electrode and which makes contact with the thin chromium film 106, and covers the silicon nitride film 103 therewith.
The active matrix substrate 100 is fabricated as follows.
First, the thin chromium film 102 which will define a gate electrode is formed on the glass substrate 101 by sputtering. Then, the thin chromium film 102 is patterned into a gate electrode.
Then, the silicon nitride film 103, the active layer 104 and the n+ doped amorphous silicon film 105 are successively formed on the glass substrate 101 by plasma-enhance chemical vapor deposition (PECVD) at 300 degrees centigrade.
Then, a data wiring layer comprised of the active layer 104 and the n+ doped amorphous silicon film 105 is patterned into an island by photolithography and dry etching.
Then, the thin chromium film 106 is formed on the n+ doped amorphous silicon film 105 by sputtering. The thin chromium film 106 acts as a barrier layer between the data wiring layer and the ITO film 107.
Then, the thin chromium film 106 and the n+ doped amorphous silicon film 105 are patterned.
Then, the ITO film 107 which will define a pixel electrode is formed by sputtering, and then, is patterned.
Thus, the active matrix substrate 100 including a thin film transistor having an amorphous silicon film, as a switching device, is fabricated through the above-mentioned steps.
Since glass has a high specific gravity, the active matrix substrate 100 including the glass substrate 101 is relatively heavy.
In particular, since glass is readily broken, the glass substrate 101 has to be formed to have a great thickness, resulting that the active matrix substrate 100 is unavoidably heavy.
These days, a liquid crystal display device is required to be light and thin, and hence, an active matrix substrate which is a part of a liquid crystal display device has to be fabricated lighter and thinner.
However, for the reasons mentioned above, there is limitation in fabricating a liquid crystal display device including a glass substrate, lighter and thinner.
Consequently, in order to fabricate a liquid crystal display device lighter and thinner, many attempts have been made to use a resin substrate in place of a glass substrate, because a resin substrate is lighter than a glass substrate and can be fabricated thinner than a glass substrate.
For instance, Japanese Unexamined Patent Publication No. 11-103064 (A) has suggested an active matrix substrate including a thin film transistor (TFT) as a switching device which thin film transistor is comprised of a thin polysilicon film formed on a resin substrate.
A thin film transistor includes a gate insulating film as an indispensable part. A gate insulating film is formed generally by plasma-enhanced chemical vapor deposition (PECVD) or sputtering.
A resin substrate generally has about 200 degrees centigrade as a maximum resistance to heat. The inventors had conducted various experiments, and found out that a gate insulating film formed by PECVD or sputtering at 200 degrees centigrade or lower, which is a maximum resistance of a resin substrate to heat, would have a low density and cause much current leakage, resulting in that the gate insulating film was not practicable. Accordingly, even if steps other than a step of forming a gate insulating film were carried out at 200 degrees centigrade or lower, it would be impossible to form a high-quality gate insulating film.
In the above-mentioned experiments, the inventors had also found out that a gate insulating film formed by PECVD or sputtering at 300 degrees centigrade or higher had a high density and had caused only small current leakage, and hence, the gate insulating film was sufficiently practicable.
However, 300 degrees centigrade is over a maximum resistance of a resin substrate to heat. Hence, if PECVD or sputtering were carried out at 300 degrees centigrade or higher for forming a gate insulating film, a resin substrate would be thermally destroyed.
Japanese Unexamined Patent Publication No. 10-173194 (A) has suggested a method of fabricating a semiconductor device, including the steps of forming a first inorganic insulating thin film on a resin substrate or resin film without exposing a surface on which the first inorganic insulating thin film is to be formed, to plasma, forming a second inorganic insulating thin film on the first inorganic insulating thin film with the surface being exposed to plasma, and forming a thin semiconductor film on either the first inorganic insulating thin film or the second inorganic insulating thin film.
Japanese Unexamined Patent Publication No. 11-174424 (A) has suggested a substrate to be used for a liquid crystal display panel which substrate is composed of copolymer polycarbonate resin containing 3, 3, 5-trimethyl-1,1-di(4-phenol) cyclohexyridene, bisphenol, and bisphenol constituents wherein the bisphenol is contained in the range of 30 to 99 mol %.
Japanese Unexamined Patent Publication No. 7-74374 (A) has suggested a thin film diode including a first electrode layer formed on a substrate, a semiconductor layer formed on the first electrode layer, a buffer layer formed on the semiconductor layer, and a second electrode layer formed on the buffer layer, wherein the semiconductor layer and the buffer layer have almost the same pattern as each other.
The above-mentioned problem remains unsolved even in the above-mentioned Publications.